Subscribe
News
5 min read
axc
axc

Nvidia Lowers Vera Rubin HBM4 and NVLink Specs

Nvidia's spec page now lists Vera Rubin GPUs at 19.2 TB/s of HBM4 and 3 TB/s of NVLink, down from 22 and 3.6 TB/s. Nvidia calls the old figures targets.

Olivetti-style cover reading Vera Rubin Spec Cut, with a GPU package, two bars and a down arrow in red, mustard and teal on cream
Olivetti-style cover reading Vera Rubin Spec Cut, with a GPU package, two bars and a down arrow in red, mustard and teal on cream

Nvidia has lowered the published memory and interconnect specs for Vera Rubin, its next AI platform, and now calls the old numbers preliminary targets. The current Vera Rubin NVL72 spec page lists each Rubin GPU with 288 GB of HBM4 at 19.2 TB/s and 3 TB/s of NVLink bandwidth. Nvidia's January launch blog listed up to 22 TB/s of HBM4 bandwidth and 3.6 TB/s of NVLink 6 per GPU, and the spec page still showed those figures on September 1. Wccftech says Nvidia showed the same figures at GTC 2026, in its report on Nvidia's statement.

In a statement Wccftech published on October 29, an Nvidia representative said: "The specifications published during Vera Rubin's development were preliminary architectural targets. Final specifications on nvidia.com and the Vera Rubin datasheet reflect what the system sustains at qualified, volume production."

Bar chart comparing old and new Rubin GPU bandwidth on nvidia.com: HBM4 22 vs 19.2 TB/s, NVLink 6 3.6 vs 3 TB/s

What changed

The cut shows up at every level of the product line. The GPU, Superchip and rack figures match Nvidia's archived and current spec pages. The HGX figures come from Wccftech's side-by-side comparison:

  • Rubin GPU: HBM4 bandwidth from 22 TB/s to 19.2 TB/s (down 12.7%). NVLink 6 from 3.6 TB/s to 3 TB/s (down 16.7%). Memory capacity stays at 288 GB.
  • Vera Rubin Superchip (two GPUs and one Vera CPU): HBM4 bandwidth from 44 TB/s to 38.5 TB/s (down 12.5%), NVLink from 7.2 TB/s to 6 TB/s (down 16.7%).
  • Vera Rubin NVL72 rack: HBM4 bandwidth from 1,580 TB/s to 1,400 TB/s (down 11.4%). NVLink from 260 TB/s to 216 TB/s (down 16.9%). HBM4 capacity unchanged at 20.7 TB.
  • HGX Rubin NVL8: HBM4 capacity from 2.3 TB to 2 TB, HBM4 bandwidth from 176 TB/s to 130 TB/s (down 26.1%), and NVFP4 training from 280 PFLOPS to 270 PFLOPS.

One metric went up. Scale-out networking bandwidth rose 12.5% at each level, for example from 28.8 TB/s to 32.4 TB/s on the NVL72 rack. The Rubin GPU's headline figure of 50 PFLOPS of sparse NVFP4 inference did not change, as the Nvidia spec page still shows.

Four panels for Vera Rubin NVL72: HBM4 bandwidth 1,580 to 1,400 TB/s, NVLink 260 to 216 TB/s, networking 28.8 to 32.4 TB/s, HBM4 capacity 20.7 TB unchanged

When it happened

Nvidia made the change without a public announcement, Wccftech reports. Wccftech says Wayback Machine snapshots from September 1 and September 11, 2026 show Nvidia revised the specs between those dates. We checked both snapshots, and they show the old and new figures above. The revision drew attention this week: TechPowerUp reported it on October 26, citing posts on X, and DigiTimes reported on October 29, citing sources, that Nvidia is adjusting the HBM4 spec for Vera Rubin NVL72 and cutting per-GPU bandwidth from 22 TB/s to 19.2 TB/s. The rest of the DigiTimes story is for subscribers only.

Nvidia's documentation is not consistent yet. On October 29, its HGX product page lists the revised system specs but still shows 22 TB/s and 3.6 TB/s for an individual Rubin GPU. Wccftech also found some regional pages with the older specs.

Why the numbers came down

Nvidia has not given a technical reason. The outside explanations so far are reports and analysis, not confirmed facts:

  • Memory speed. TechPowerUp says the HBM4 pin speed dropped from 11.7 Gbps to 9.6 Gbps. It argues the problem "does not stem directly from NVIDIA's suppliers" and points to Nvidia's own memory bus and signaling.
  • Signal integrity on NVLink. TechPowerUp reports that Nvidia lowered the NVLink Nyquist frequency target from 56 GHz to 47 GHz. A lower target puts less electrical strain on the SerDes, cables and materials, which can help yields, at the cost of some peak bandwidth.
  • Supplier pressure. Wccftech points to earlier industry reporting, based on SemiAnalysis research, that HBM4 suppliers were struggling to meet Nvidia's original bandwidth targets. Relaxing the target could help yields and memory supply.

That last point fits the memory news of the week. Samsung said this week its 2027 HBM is sold out, and SK hynix reported quarterly revenue above 100 trillion won on HBM4 demand.

Nvidia's case: specs are not performance

Nvidia's argument is that per-part bandwidth is the wrong way to judge the system. "Individual component specifications do not determine application performance," the representative told Wccftech. The company says Vera Rubin is built for agents, workloads that "reason, call tools, retrieve and evaluate thousands of times per task," so performance "is decided at data center scale rather than by any single component."

Nvidia also says the third-party benchmarks published so far were run on production specs. "Vera Rubin NVL72 is in full production and shipping today," the statement said, citing "30x more performance per watt and 30x more tokens per dollar versus the previous-generation GB300 NVL72." It pointed buyers to AgentX with SemiAnalysis and AgentPerf with Artificial Analysis.

If those benchmarks were in fact run on production specs, the real-world results buyers have seen already reflect the lower specs. What changes is the paper comparison.

Why it matters

Nvidia's statement does not dispute that the published numbers fell. The revision narrows Nvidia's lead on paper and, by TechPowerUp's count, puts Rubin behind AMD on memory. TechPowerUp says AMD's Instinct MI455X carries 432 GB of HBM4 per GPU at 23.3 TB/s, and that AMD's 72-GPU Helios rack aggregates about 31 TB of HBM4 and about 1.67 PB/s of bandwidth, against 20.7 TB and 1.4 PB/s on Vera Rubin NVL72. AMD's Helios racks are now in testing at Meta.

For customers, the practical question is how their own models and agent workloads run on shipping systems. For the rest of the market, the episode is a reminder that spec sheets for a chip still in development are targets, and that an unannounced edit to a product page can move them.

Sources

NewsSemiconductorsHardware

Written by

axc
axc

Edited by the llms.blog desk.

More in Semiconductors

All Semiconductors →

Popular this week