AMD on November 10 announced general availability of its 6th Gen EPYC server processors, the family known by the code name Venice. The first chips use the SP7 socket and the new Zen 6 architecture. AMD says SP7 systems "are shipping from leading server vendors," and that cloud instances from Microsoft Azure and Oracle Cloud Infrastructure (OCI) "will be generally available soon."
AMD pitches Venice as a CPU for the AI era. Its argument is that AI expands the work CPUs do: running AI agents, feeding GPU servers, and running the business software companies already use. Below are the specs, the prices, the customers, and the claims to read with care.
What AMD launched
Next Platform reports that the Venice line "initially has 31 different CPUs," spanning 8 to 256 cores, 130 to 600 watts, and $700 to $14,904 each when bought in 1,000-unit trays. Nine of those chips use the SP7 socket that ships now. The other 22 use a more mainstream SP8 socket. Next Platform says AMD has only committed to shipping SP8 parts sometime in the first half of 2027.
The top chip is the EPYC 9996. The press release footnotes list it at 256 cores, 600W of "Default CPU Power," and a $14,904 price per chip at 1,000 units. For a baseline, the same footnote lists the previous top part, the 5th Gen EPYC 9965, at 192 cores per socket, 500W and $11,988.
AMD now uses "Default CPU Power" instead of TDP for this family. The footnotes say it "reflects total power consumed across the processor's compute and I/O dies for the stated performance target."
Two core types, one cache design
Venice uses two kinds of compute chiplets. Wccftech reports that the dense Zen 6C chiplets carry up to 32 cores and 128 MB of cache each, for up to 256 cores and 1,024 MB of L3 cache per chip. The Zen 6 chiplets carry up to 12 cores and 48 MB of L3, for up to 96 cores and 384 MB per chip.
Next Platform says both chiplet types are made on TSMC 2 nanometer processes. It also notes a change from the last generation: on Turin, AMD cut the L3 cache on its dense Zen 5c chiplets in half. On Venice, both chiplet types keep the same cache layout, and AMD tunes the cores differently instead.
AMD's release says its high-frequency processors for GPU host nodes run at up to 5.3 GHz.
Memory and I/O
Next Platform describes the SP7 platform this way:
- 16 channels of DDR5 memory per socket, one module per channel
- Up to 1.6 TB/s of memory bandwidth with MRDIMMs at 12.8 GT/s
- Up to 1 TB/s with regular RDIMMs at 8 GT/s
- 96 PCIe 6.0 lanes plus eight PCIe 4.0 lanes per socket
- In a two-socket server, 128 PCIe 6.0 lanes plus 16 PCIe 4.0 lanes exposed, with 64 lanes used for the link between the sockets
The SP8 socket trades memory for I/O. Next Platform reports eight DDR5 channels per socket with two modules per channel, and 128 PCIe 6.0 lanes. It sums this up as "half the memory bandwidth but 33 percent more I/O."
Who is using it
AMD named three customers in its release:
- Meta "is working with AMD as a lead customer and has been validating 6th Gen AMD EPYC CPU-based platforms as the companies prepare for deployment at scale."
- Microsoft Azure has Azure HDv2 in preview "for AI data processing, agentic AI and HPC." AMD also lists Azure HXv2 for chip design and technical computing, and Azure ND MI455X v7, based on AMD's Helios rack, for AI inference.
- OCI: AMD says "OCI Compute E7 cloud compute instances will be powered by 6th Gen AMD EPYC server processors, supporting enterprise applications and the CPU services surrounding AI models."
The release also covers AMD Helion, which AMD calls its agentic AI racks. It names three options: Helion Liquid, designed to sit next to AMD's Helios rack-scale systems; Helion Air, for air-cooled data centers; and Helion Air Inference, which combines CPU work and local GPU inference in one rack. AMD says some Helion configurations reach up to 73,728 threads in one rack. Lisa Su also described Helion when AMD reported its third-quarter results. In October, AMD said its first Helios racks were installed and being tested at Meta, as we reported.
The performance claims, and what they compare
AMD's release says a system with the EPYC 9996 "delivers up to 3.7x more performance compared with an Nvidia Vera CPU-based system and up to 2.2x the performance and 2.0x the performance per dollar of an Intel Xeon 6980P system."
The footnotes show where those numbers come from. They compare two-socket scores on the SPECrate 2017 integer test:
- 2P AMD EPYC 9996: 5,470 (published score)
- 2P AMD EPYC 9965: 3,260 (published score)
- 2P Intel Xeon 6990E+: 3,050 (published score)
- 2P Intel Xeon 6980P: 2,510 (published score)
- 2P Nvidia Vera: 1,459 (AMD internal estimate)
Two points matter here. First, the Vera figure is not a measured result. AMD says the Vera and Arm AGI "scores are AMD internal estimates based on AMD engineering projections and subject to change." Second, AMD's 2.2x claim uses the Xeon 6980P as its Intel baseline. The same footnote also lists the Xeon 6990E+, with a higher published score of 3,050.
AMD also claims its high-frequency parts "can deliver up to 1.8x the LLM output throughput of previous generation EPYC processors." The footnote shows that this is a projection. AMD measured a 5th Gen system on a PCIe Gen 5 link with model weights offloaded to the CPU, then projected the result to PCIe Gen 6 because the faster link doubles host-to-GPU bandwidth.
The agent density claims are also estimates. AMD says agent counts "are estimates derived from available CPU thread resources used as a proxy under a consistent theoretical workload."
Why it matters
AMD's case is that AI work does not run on accelerators alone. The release lists three CPU roles in agentic AI infrastructure: "general-purpose services, GPU host nodes, and agent sandboxes." AMD offers a different Venice part for each role. Google, for example, pairs its confidential TPU 8tx systems with 5th Gen EPYC host CPUs.
Dan McNamara, senior vice president and general manager of Compute and Enterprise AI at AMD, said in the release: "AI is significantly expanding the role of the CPU across every layer of the data center."
The first named customers are Meta, Azure and OCI. Azure HDv2 is in preview, and the OCI E7 instances are not yet generally available.
What to watch next:
- Independent benchmarks of the EPYC 9996 against Intel Xeon and Nvidia Vera. AMD's Vera figure is its own estimate.
- General availability dates for Azure HDv2 and OCI E7.
- SP8 chips, which Next Platform says AMD has committed to ship in the first half of 2027.
