Intel has introduced the Intel GPU D-series, a data center accelerator engineered specifically for large language model inference workloads. Unveiled at the Open Compute Project (OCP) Global Summit, the accelerator (previously codenamed Crescent Island) integrates up to 480GB of LPDDR5X memory, prioritizing raw memory capacity and power efficiency over ultra-high-bandwidth memory tiers.
By equipping a single PCIe accelerator with 480GB of memory, Intel surpasses the onboard capacity of Nvidia's Blackwell Ultra B300, which carries 288GB of HBM3e memory.
Architectural Trade-Offs: LPDDR5X vs. HBM
Frontier LLM inference is heavily bound by memory capacity. Serving multi-billion-parameter models requires holding entire parameter sets, KV caches, and intermediate activation states in fast memory. While high-bandwidth memory (HBM) architectures offer peak transfer rates for training and low-latency token generation, they introduce substantial cost, complex packaging requirements, and tight supply constraints.

Intel selected LPDDR5X, a low-power memory standard widely used in mobile devices and workstations, to achieve density and energy efficiency within standard data center footprints. Key technical specifications include:
- Memory Capacity: Up to 480GB LPDDR5X
- Memory Bandwidth: 1.5 TB/s
- Compute Performance: 1.3 PFLOPS (FP8 precision)
- Form Factor: Standard PCIe add-in card
- Cooling and Power: Air-cooled design within a 350W TDP envelope
While 1.5 TB/s bandwidth is lower than the multi-terabyte-per-second throughput of top-tier HBM3e configurations, the large memory pool eliminates the need to split moderate-sized models across multiple physical accelerators.
Single-Card Model Hosting and Multi-Node Scaling
According to Intel, the 480GB memory capacity allows a single GPU D-series card to host models containing up to 300 billion parameters. In eight-accelerator server configurations, the combined pool scales beyond 3.8TB of accessible memory, enabling local deployment of models exceeding 1 trillion parameters without resorting to aggressive offloading.

The accelerator is designed to pair directly with Intel Xeon host CPUs. Intel positions this hybrid CPU-GPU structure for multi-stage agentic workflows, where host processors coordinate data retrieval, tool calling, and workflow logic while the GPU manages continuous token generation.
Data Center Retrofits and Market Availability
By adhering to a standard PCIe form factor, air cooling, and a 350W power envelope, the D-series can drop into existing data center racks without requiring dedicated liquid cooling loops or specialized power distribution units.
Intel has not yet disclosed commercial pricing or exact general-availability delivery dates for the GPU D-series.
