At the Hot Chips 2026 conference, Intel outlined architectural disclosures for three upcoming computing platforms tailored for AI workflows: the Xeon 7 enterprise processor (codename Diamond Rapids), the Crescent Island data center inference GPU, and the Wildcat Lake client processor (Intel Core Series 3).
The announcements detail Intel's shift toward modular multi-die packaging, open chiplet interconnect standards, and expanded on-chip memory to meet the computational demands of multi-agent AI systems and large-scale model serving.
Diamond Rapids: 256-Core Architecture and 1.28 GB L3 Cache
Intel's next-generation flagship server platform, Xeon 7 (Diamond Rapids), introduces a major microarchitectural overhaul aimed at high-performance computing (HPC) and agentic orchestration. The processor scales up to 256 performance cores within a single socket, omitting simultaneous multithreading (SMT) entirely in favor of dedicated single-thread execution units.
Diamond Rapids relies on a 22-chiplet modular design disaggregated across three distinct process nodes:
- Compute Dies: Up to 16 compute dies fabricated on Intel's refined 18A-P process node. Intel reports the node provides an 18% power reduction at matched performance or a 9% performance increase at iso-power.
- Compute Building Blocks (CBB): Four base dies fabbed on Intel 3-T and connected using Foveros Direct 3D hybrid bonding. Each CBB integrates 320 MB of L3 cache, delivering up to 1.28 GB of Last Level Cache (LLC) across the processor.
- Scalable Fabric Hubs (SFH): Two dedicated I/O and memory hub dies fabricated on Intel 3.
To eliminate non-uniform memory access (NUMA) penalties across the multi-die package, Intel implemented an organic substrate interconnect called "fan-out-fabric" based on the Universal Chiplet Interconnect Express (UCIe-S) standard. This structure maintains Uniform Memory Access (UMA) across all 256 cores. The platform provides 16 DDR5 memory channels supporting data rates of 8,000 MT/s with standard modules and up to 12,800 MT/s using Multiplexer Combined Ranks (MRDIMMs), alongside 128 lanes of PCIe Gen 6 and CXL 3.0.
For machine learning acceleration, the compute cores incorporate Advanced Matrix Extensions (AMX) with native FP8 data type support, Advanced Performance Extensions (APX), and full AVX10.2 vector instructions.
Crescent Island: 480GB Air-Cooled Inference GPU
Alongside Diamond Rapids, Intel revealed Crescent Island, a dedicated PCIe accelerator built to optimize the operational economics of real-time LLM inference and long-context processing.
Crescent Island is powered by the Xe3P architecture, integrating 32 Xe cores and 256 Xe Matrix eXtensions (XMX) engines. The accelerator is paired with up to 480GB of unified LPDDR5X memory, allowing enterprise deployments to host larger parameter models and support concurrent agent contexts without partitioning workloads across complex multi-node clusters.
Designed for standard air-cooled enterprise server infrastructure, Crescent Island operates within a 350-watt thermal envelope.
Wildcat Lake: 18A Client Silicon with UCIe
For client and edge deployments, Intel detailed Wildcat Lake, branded as Intel Core Series 3. Fabricated on the Intel 18A process node, Wildcat Lake represents Intel's first commercial processor to integrate UCIe-based chiplet interconnects in a mainstream client form factor.
The system-on-chip incorporates 2 performance cores, 4 efficiency cores, integrated Xe3 graphics with XMX acceleration, and a neural processing unit (NPU) delivering 17 TOPS for hybrid edge inference workloads, paired with memory support for LPDDR5X-7467.
