Alphabet subsidiary Waymo has disclosed the architectural specifications of the computing platform powering its sixth-generation autonomous driving system, revealing a custom 5-nanometer application-specific integrated circuit (ASIC) engineered specifically for front-end sensor ingestion and edge machine learning.
The disclosure, authored by VP of Engineering Satish Jeyachandran and Compute Lead Daniel Rosenband, details how the company processes raw data from onboard sensor arrays in real time while operating under strict latency, thermal, and spatial constraints inside vehicle trunks.
Custom Silicon for Front-End Sensor Processing
The central piece of Waymo's in-vehicle hardware revision is a proprietary 5nm ASIC fabricated by Taiwan Semiconductor Manufacturing Co. (TSMC). The processor delivers 1,000 trillion operations per second (TOPS), equivalent to one quadrillion operations per second, matching the raw compute density of leading automotive acceleration platforms.
Rather than routing uncompressed, high-bandwidth sensor feeds directly to central host processors, the custom ASIC sits at the hardware ingress layer. It cleans, filters, and synchronizes telemetry across 13 high-resolution cameras, lidar units, and radar sensors simultaneously. The chip executes preliminary neural network evaluations on incoming frames, enabling low-latency object detection and improved perception in degraded environmental conditions such as extreme low-light scenes.
Heterogeneous Compute and Supplier Ecosystem
Waymo's compute stack relies on a heterogeneous design that combines custom silicon with commercial accelerators and memory subsystems. The company confirmed partnerships across seven semiconductor and memory vendors:
- ASIC Fabrication and Design: TSMC (5nm manufacturing) and Socionext (custom SoC engineering).
- General Compute and Graphics: AMD and Nvidia for host processing, downstream path planning, and deep neural network execution.
- Memory and Storage: Micron, Samsung, and SanDisk for automotive-grade DRAM and flash storage.
This division of labor reserves specialized silicon for real-time sensor fusion and front-end neural network workloads while utilizing commercial merchant silicon for operating system management, data movement, telemetry logging, and higher-level motion planning.
System Principles and Operational Economics
Waymo defined three engineering requirements that govern its onboard computing architecture:
- Responsiveness: Scaling in-vehicle compute capacity by a factor of 20 over the past eight years to process complex urban edge cases with sub-millisecond perception latency.
- Ruggedization: Packaging high-density compute to operate passively and reliably against automotive vibration, shock, and extreme operating temperatures without occupying excessive luggage space.
- Redundancy: Implementing isolated, dual-channel parallel computing hardware to ensure safe stop capabilities in the event of primary hardware subsystem failure.
The architectural transition aligns with Waymo's broader cost-reduction roadmap. Industry estimates place sixth-generation autonomous hardware suite costs between $20,000 and $25,000 per vehicle, down from $100,000 to $125,000 in fifth-generation deployments. Waymo currently operates a commercial fleet of approximately 4,000 driverless vehicles across more than 10 metropolitan areas, serving roughly 500,000 paid passenger trips per week.
